-
-
The "Real Mode" Execution Environment (2 Questions)
This content is graded -
Lab: Looking at the Reset Vector in Simics (1 Question)
This content is graded -
Processor State After Reset: Segmentation & Code Execution (3 Questions)
This content is graded -
Processor State After Reset: Control Registers (3 Questions)
This content is graded -
Real Mode 20-bit Segmentation (2 Questions)
This content is graded
-
-
-
The Evolution of the Platform Architecture (3 Questions)
This content is graded -
The Two Key Devices We Care About: DRAM Controller and LPC Device (1 Question)
This content is graded -
Finding the Correct Manual for the Hardware You Have (4 Questions)
This content is graded -
Optional Data Submission
-
Chipsets Conclusion (2 Questions)
This content is graded -
Optional Lab: Secret (BIOS) Decoder Ring
-
-
-
The Memory Map and Memory-Mapped IO (MMIO) (3 Questions)
This content is graded -
What Does it Mean to be Memory Mapped? (3 Questions)
This content is graded -
Port IO (PIO) Reminder (2 Questions)
This content is graded -
Fixed IO Ports (8 Questions)
This content is graded -
Variable IO Ports (3 Questions)
This content is graded -
Port-Access Styles (8 Questions)
This content is graded
-
-
-
PCI Evolution & Topology (9 Questions)
This content is graded -
The Three Address Spaces of PCI (6 Questions)
This content is graded -
PCIe vs. PCI (5 Questions)
This content is graded -
Addressing and Accessing the PCI Configuration Address Space via Port IO (5 Questions)
This content is graded -
PCI Config Address Space Header (4 Questions)
This content is graded -
PCI Base Address Registers (BARs) (8 Questions)
This content is graded -
Interpreting PIO PCIe Config Space Access, and an Introduction to RCBA! 🖖 (5 Questions)
This content is graded -
Using MMIO to Access PCIe Extended Configuration Address Space (7 Questions)
This content is graded -
PCI Conclusion (1 Question)
This content is graded -
Optional Lab: Secret (BIOS) Decoder Ring Reloaded
-
-
-
Introduction & Supported SPI Operation Modes on x86 Hardware (3 Questions)
This content is graded -
SPI Flash Programming Interface (17 Questions)
This content is graded -
Intel Flash Descriptor and the SPI Flash Layout (2 Questions)
This content is graded -
Optional: Intel Flash Descriptor Nitty-Gritty Deep-Dive
-
Flash Protection Threat Tree: Moves and Counter-Moves (26 Questions)
This content is graded -
SPI Flash Research Unlocked! (1 Question)
This content is graded
-